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Course Evaluation Results

Course Details

Spring 2011-2012
ELE 577   Graded A-F, P/D/F, Audit

Low Power IC and System Design

Niraj K. Jha

Sources of power consumption; simulation power analysis, probabilistic power analysis; circuit and logic level power optimization; power analysis and optimization at the register-transfer, behavior and system levels; power management; software power estimation and optimization; hardware-software co-synthesis for low power.

Sample reading list:
A.P. Chandrakasan & R.W. Brodersen, Lower Power Digital CMOS Design
A. Raghunathan, N. K. Jha & S. Dey, High-Level Power Analysis and Optimization

Schedule/Classroom assignment:

Class numberSectionTimeDaysRoomEnrollmentStatus
42010 L01 11:00:00 am - 12:20:00 pm T Th   Engineering Quad J-Wing   J201   Enrolled:5 Limit:30