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Course Offerings

Course Evaluation Results

Course Details

Spring 2017-2018
ELE 575   Graded A-F, P/D/F, Audit

Computer Architecture

David Wentzlaff

Modern computer processor architecture. I/O Architecture. Instruction-set architecture and high-performance processor organization including pipelining and data and instruction parallelism. Cache, memory, and storage architectures. Multiprocessors and multicore processors. Coherent caches. Interconnection and network infrastructures.

Sample reading list:
Hennessy, J. and Patterson D., Computer Architecture: A Quantitive Approach |
Shen, J. and Lipasti, M., Modern Processor Design

Mid Term Exam - 20%
Final Exam - 30%
Design Project - 20%
Lab Reports - 25%
Class/Precept Participation - 5%

Other Requirements:
Open to Graduate Students Only.

Other information:
See instructor for complete list

Schedule/Classroom assignment:

Class numberSectionTimeDaysRoomEnrollmentStatus
43876 L01 11:00:00 am - 12:20:00 pm M W   Engineering Quad B-Wing   B205   Enrolled:6 Limit:35
43875 B01 07:30:00 pm - 10:20:00 pm F        Enrolled:6 Limit:35