Skip over navigation

Course Offerings

Course Evaluation Results

Course Details

Fall 2018-2019
ELE 575   Graded A-F, P/D/F, Audit

Computer Architecture

David Wentzlaff

Modern computer processor architecture. I/O Architecture. Instruction-set architecture and high-performance processor organization including pipelining and data and instruction parallelism. Cache, memory, and storage architectures. Multiprocessors and multicore processors. Coherent caches. Interconnection and network infrastructures.

Sample reading list:
Hennessy, J. and Patterson D., Computer Architecture: A Quantitive Approach |
Shen, J. and Lipasti, M., Modern Processor Design

Mid Term Exam - 20%
Final Exam - 30%
Design Project - 20%
Lab Reports - 25%
Class/Precept Participation - 5%

Other Requirements:
Open to Graduate Students Only.

Other information:
See instructor for complete list

Schedule/Classroom assignment:

Class numberSectionTimeDaysRoomEnrollmentStatus
22738 L01 01:30:00 pm - 02:50:00 pm M W   Engineering Quad J-Wing   J201   Enrolled:10 Limit:35
22737 B01 07:30:00 pm - 10:20:00 pm F   Engineering Quad J-Wing   J201   Enrolled:10 Limit:35